I was looking into the traces and what I have seen that data read operation take place in two stage, first it will wait for an event and then it will read the data,
consider the following example :
Read EEPROM parameter :
1. Send MSG over SPI,
2. Wait for an event (IRQ line changes its status and host will process it)
3. Read Data (again IRQ line changes its status from high to low)
So here in host controller there is an interrupt routine for IRQ line (H to L transaction).
So my question is what if I miss the interrupt in third step cause of processing data received in 2nd step , will CC3000 raise an interrupt again or it will go in unknown stage.