I have trouble understanding how the input impedance of the CC2500 is modeled as a Capacitor in parallel with a Resistor in "Application Note AN068
Adapting TI LPRF Reference Designs for Layer Stacking" by Rea Schmid.
In section 5.2(page 6) of the application note, the author tries to make a model for the internal impedance of cc2500(all calculations are for 2.45 GHz only).
The issue is that 40 ohm and 878 femto Farad in parallel do not amount to 80-74j, which is the internal impedance of cc2500. Also, I do not inderstand how he arrived at this model.
I am pretty sure he is right and I am the one who is missing something. I am not an expert in this field. So please bear with me. Any ideas on how he arrived at that model.
Thanks very much.