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Forum Post: RE: TRF7960 Demo with DK-LM3S9B96

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Hi, 

Are there any updates on this subject ? I am working on ISO15693 implementation for the TRF7960 using the same base code as Michael. 

I can't get a valid UID reading : 

TRF7960IRQWaitTimeout(TRF7960_WAIT_RXEND, 100); always return 0x01

Do you have a working ISO15693 source code for Stellaris devices ?

Below is my source code :

Initialisation of TRF registers :

//Init Chip status register for Active mode, direct =0, RF non active, full output power,RX_IN_1,AGC_ON,rec_on=1,5V operation

TRF7960WriteRegister(TRF7960_CHIP_STATUS_CTRL_REG,

TRF7960_STATUS_CTRL_RF_PWR_FULL | TRF7960_STATUS_CTRL_5V_OP

);

rb=TRF7960ReadRegister(TRF7960_CHIP_STATUS_CTRL_REG);


//Init ISO CONTROL register for ISO15693, high bit rate, 1 sub carrier codage 1/4

TRF7960WriteRegister(TRF7960_ISO_CONTROL_REG,

TRF7960_ISO_CONTROL_RX_CRC_N | TRF7960_ISO_CONTROL_15693_HBR_1S_1_4


);

rb=TRF7960ReadRegister(TRF7960_ISO_CONTROL_REG);

//Init Modulator control register

TRF7960WriteRegister(TRF7960_MODULATOR_CONTROL_REG,

TRF7960_MOD_CTRL_SYS_CLK_DISABLE|0x08|TRF7960_MOD_CTRL_MOD_OOK_100


);

rb=TRF7960ReadRegister(TRF7960_MODULATOR_CONTROL_REG);

//Init Regulator and I/O control

TRF7960WriteRegister(TRF7960_REGULATOR_CONTROL_REG,

TRF7960_REGULATOR_CTRL_AUTO_REG


);

rb=TRF7960ReadRegister(TRF7960_REGULATOR_CONTROL_REG);

//Init IRQ Status register to signal no-esponse interrupt


TRF7960WriteRegister(TRF7960_IRQ_MASK_REG,

TRF7960ReadRegister(TRF7960_IRQ_MASK_REG)|0x01


);

rb=TRF7960ReadRegister(TRF7960_IRQ_MASK_REG);
//
// Delay 4ms before leaving the initialization function.

SysCtlDelay(g_ulDelayms * 4);

ISO15693 Inventory Sequence : I'm using only one slot 

 TRF7960CheckRXWaitTime();

no_slots = 1; // 1 slot

size = mask_size + 3;
buf[0] = 0x8F;
buf[1] = 0x90; // send without CRC
buf[2] = 0x3D;
// write continuous from 1D
buf[3] = (char)(size>>8);
buf[4] = (char)(size<<4);;
buf[5] = 0x26; //flages // ISO15693 flags
buf[6] = 0x01;
buf[7] = 0x00; // mask length, 0

fifo_length = 8;

  TRF7960ResetIrqStatus();

GPIOPinIntClear(TRF7960_IRQ_BASE, TRF7960_IRQ_PIN);
GPIOPinIntEnable(TRF7960_IRQ_BASE, TRF7960_IRQ_PIN);

g_sIRQState.ucState = 0x00;

TRF7960ResetFifo(); // CMD 0x0F - Reset FIFO

TRF7960Command(TRF7960_TRANSMIT_NO_CRC_CMD);

TRF7960Transmit( &buf[0], 0x08 , 0 );

TRF7960IRQWaitTimeout(TRF7960_WAIT_TXEND, 10); // after TRF7960IRQWaitTimeout, TRF7960ReadIRQStatus() == 0x80

recbuf[0]=TRF7960ReadIRQStatus();

TRF7960ResetFifo(); // CMD 0x0F - Reset FIFO

recbuf[0]=TRF7960IRQWaitTimeout(TRF7960_WAIT_RXEND, 100); //ALWAYS 0x01 => timeout
if( recbuf[0] == 0x00 ) // Timeout

{

recbuf[0] = TRF7960ReadRegister(TRF7960_FIFO_STATUS_REG);
recbuf[0] = (recbuf[0] + 1) & 0xf;

TRF7960ReadRegisterContinuous( TRF7960_FIFO_REG , &recbuf[1], recbuf[0]);

if( (recbuf[1]&0x80)==0x00 ) // errorflag == 0?

{

erg = 0x00;

}

else

{

erg = 0x01;

}

}

else

erg = 0x02;
}

Thank you in advance


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