Ok that is all very helpful.
Just to make sure that I'm on the right page...according to "Table 2: Status Byte Summary" on of the manual, the upper 4 bits tell me the status of the chip, and I can disregard the lower 4 bits? Or do those lower 4 bits always indicate the amount of space left in the FIFO buffer?
Once I've sent a packet, I wait until PKT_SYNC_RXTX goes high, and then I continue waiting until it goes low. Once that happens, I begin sending another packet. I've attached a logic capture showing what happens when I do that however. I'm not sure if it is my MCU or not, but I'm noticing that after a couple bytes, the status changes from Tx, to settling, to calibrate, and then to idle, and then SPI comm completely stops with nothing at all happening after that (it doesn't finish the 30 bytes, and then never transmits again). Is the transceiver holding all of my SPI pins high?
I believe that I'm getting stuck in a while loop that waits for the MISO line to drop low...but it is staying high constantly. So I don't think it is my MCU.
