Just want to understand whether it is intended behavior or bug that may get fixed on the later chip revisions.
Disabling individual interrupt from DIS[0..4] resets entire EN[1..4] Interrupts enable register it is associated with
Environment: CC2538 on CC2538EM 1.0. SmartRF06 EB, IAR compiler
It does not seem to be generated code issue. The same behavior is observable modifying register context from the debugger's Watch view.
Speaking on example:
#define INTERRUPT_ENABLE_REG (*((volatile unsigned int *)0xE000E100)) /* Interrupt Enable register EN0 */
#define INTERRUPT_DISABLE_REG (*((volatile unsigned int *)0xE000E180)) /* Interrupt Disable register DIS0 */
1. Read EN0 before. Lets say it shows EN0_before = 0x00400021
2. Disable Interrupt on Bit_0: INTERRUPT_DISABLE_REG |= 0x00000001;
3. Read EN0 after: EN0_after = 0x00000000;
Current workaround is restoring EN0 after #2 step above:
1. Read EN0_before
2. INTERRUPT_DISABLE_REG |= 0x00000001;
3. EN0_after = (EN0_before & ~0x00000001);
4. INTERRUPT_ENABLE_REG = EN0_after;